Automated, time-compressed simulation on the desktop

Prover iLock Simulator provides very efficient simulation of large sets of test cases against system designs created in Prover iLock. The simulation is time-compressed, which is considerably faster than execution on the target hardware platform. This makes it efficient to determine the functional correctness of a system during development, saving development time in and lets engineers spend their time more efficiently.

All test cases and simulation results obtained can be exported, enabling hardware-in-the-loop testing to repeat all desktop simulation results.

The Simulator supports distributed systems, as well as both vital and non-vital code. The execution models in a distributed system can be mixed, making it possible to make a very accurate simulation of a distributed interlocking system with communication links, remote office control systems, environment models (simulating behavior of wayside objects) and multiple platforms.

Prover iLock Simulator has a powerful built-in debugger, which makes it efficient to pin-point the cause of failing test cases, and to visualize the system's behavior (see screenshots below).